Waymo unveiled the specs of its custom 5‑nm ASIC that processes sensor data in real time, revealing its hardware suppliers and design principles.
Waymo has finally disclosed the inner workings of the custom silicon that powers its fleet of autonomous robotaxis, detailing a 5‑nanometer application‑specific integrated circuit (ASIC) designed to crunch sensor data in real time.
The ‘Waymo Brain’ ASIC
The chip, internally dubbed the “Waymo Brain,” is built on a 5‑nm process and integrates multiple neural‑network accelerators, a high‑throughput vision processor, and dedicated safety cores. This architecture enables the company to run perception, prediction and planning algorithms on‑board without reliance on external compute clouds.
Key design principles
Waymo’s engineers prioritized three core principles: low latency, energy efficiency, and redundancy. By processing lidar, radar and camera inputs directly on the ASIC, the system reduces the round‑trip time for sensor fusion to under 10 milliseconds, a critical factor for safe navigation in complex urban environments.
The chip’s power envelope stays under 30 watts, allowing the robotaxi to maintain a respectable driving range while keeping thermal loads manageable. Redundant compute blocks ensure that a single point of failure does not compromise the vehicle’s ability to operate safely.
Hardware partners
Waymo collaborated with several industry leaders to bring the ASIC to life. The silicon wafer fabrication is handled by Taiwan Semiconductor Manufacturing Company (TSMC) using its cutting‑edge 5‑nm node. The design tools and IP blocks were supplied by Arm, while the high‑speed memory interfaces come from Micron Technology.
- TSMC – 5‑nm process manufacturing
- Arm – CPU cores and neural‑network IP
- Micron – LPDDR5 memory modules
Implications for autonomous driving
By moving the bulk of computation onto a purpose‑built chip, Waymo can achieve more deterministic performance, a key advantage over competitors that rely on off‑the‑shelf GPUs or CPUs. The tighter integration also opens the door for future software updates that can leverage the ASIC’s programmable accelerators without hardware redesign.
Analysts note that this move signals a maturation of the autonomous‑vehicle industry, where bespoke hardware becomes a differentiator for scaling fleets and meeting regulatory safety standards.